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The preceding workshop (1st, 1999) has been reviewed (see Zbl 0929.00092).  Indexed articles:  \\textit{Hankerson, Darrel; Hernandez, Julio L\u00f3pez; Menezes, Alfred}, Software implementation of elliptic curve cryptography over binary fields, 1-24 [Zbl 0998.94534]  \\textit{Okada, Souichi; Torii, Naoya; Itoh, Kouichi; Takenaka, Masahiko}, Implementation of elliptic curve cryptographic coprocessor over \\(\\text{GF}(2^m)\\) on a FPGA, 25-40 [Zbl 0998.68649]  \\textit{Orlando, Gerardo; Paar, Christof}, A high-performance reconfigurable elliptic curve processor for \\(\\text{GF}(S^m)\\), 41-56 [Zbl 0998.68650]  \\textit{Chung, Jae Wook; Sim, Sang Gyoo; Lee, Pil Joong}, Fast implementation of elliptic curve defined over \\(\\text{GF}(p^m)\\) on \\(\\text{CalmRISC}\\) with \\(\\text{MAC}2424\\) coprocessor, 57-70 [Zbl 0998.68654]  \\textit{Shamir, Adi}, Protecting smart cards from passive power analysis with detached power supplies, 71-77 [Zbl 0998.68656]  \\textit{Mayer-Sommer, Rita}, Smartly analyzing the simplicity and the power of simple power analysis on smartcards, 78-92 [Zbl 0998.68658]  \\textit{Hasan, M. Anwar}, Power analysis attacks and algorithmic approaches to their countermeasures for Koblitz curve cryptosystems, 93-108 [Zbl 0998.94535]  \\textit{Schindler, Werner}, A timing attack against RSA with the Chinese Remainder Theorem, 109-124 [Zbl 0998.94536]  \\textit{Dandalis, Andreas; Prasanna, Viktor K.; Rolim, Jose D. P.}, A comparative study of performance of AES final candidates using FPGAs, 125-140 [Zbl 0998.68663]  \\textit{Patterson, Cameron}, A dynamic FPGA implementation of the Serpent block cipher, 141-155 [Zbl 0998.68665]  \\textit{Trimberger, Steve; Pang, Raymond; Singh, Amit}, A 12 Gbps DES encryptor/decryptor core in an FPGA, 156-163 [Zbl 0998.68666]  \\textit{Leitold, Herbert; Mayerwieser, Wolfgang; Payer, Udo; Posch, Karl Christian; Posch, Reinhard; Wolkerstorfer, Johannes}, A 155 Mbps triple-DES network encryptor, 164-174 [Zbl 0998.68670]  \\textit{Goodman, James; Chandrakasan, Anantha}, An energy efficient reconfigurable public-key cryptography processor architecture, 175-190 [Zbl 0998.68672]  \\textit{Gro\u00dfsch\u00e4dl, Johann}, High-speed RSA hardware based on Barret's modular reduction method, 191-203 [Zbl 0998.68674]  \\textit{Walter, Colin D.}, Data integrity in hardware for modular arithmetic, 204-215 [Zbl 0998.94565]  \\textit{Kato, Takehiko; Ito, Satoru; Anzai, Jun; Matsuzaki, Natsume}, A design for modular exponentiation coprocessor in mobile telecommunication terminals, 216-228 [Zbl 0998.68677]  \\textit{Naccache, David; Tunstall, Michael}, How to explain side-channel leakage to your kids, 229-230 [Zbl 0998.68679]  \\textit{Coron, Jean-S\u00e9bastien; Goubin, Louis}, On Boolean and arithmetic masking against differential power analysis, 231-237 [Zbl 0998.94537]  \\textit{Messerges, Thomas S.}, Using second-order power analysis to attack DPA resistant software, 238-251 [Zbl 0998.94538]  \\textit{Clavier, Christophe; Coron, Jean-S\u00e9bastien; Dabbous, Nora}, Differential power analysis in the presence of hardware countermeasures, 252-263 [Zbl 0998.94539]  \\textit{Wu, Huapeng}, Montgomery multiplier and squarer in \\(\\text{GF}(2^m)\\), 264-276 [Zbl 0998.68685]  \\textit{Sava\u015f, Erkay; Tenca, Alexandre F.; Ko\u00e7, \u00c7etin K.}, A scalable and unified multiplier architecture for finite fields \\(\\text{GF}(p)\\) and \\(\\text{GF}(2^m)\\), 277-292 [Zbl 0998.68687]  \\textit{Hachez, Ga\u00ebl; Quisquater, Jean-Jacques}, Montgomery exponentiation with no final subtractions: Improved results, 293-301 [Zbl 0998.94540]  \\textit{Weingart, Steve H.}, Physical security devices for computer subsystems: A survey of attacks and defenses, 302-317 [Zbl 0998.68690]  \\textit{Pornin, Thomas; Stern, Jacques}, Software-hardware trade-offs: Application to A5/1 cryptanalysis, 318-327 [Zbl 0998.68692]  \\textit{Hoffstein, Jeffrey; Silverman, Joseph H.}, MiniPASS: Authentication and digital signatures in a constrained environment, 328-339 [Zbl 0998.94547]  \\textit{Joye, Marc; Paillier, Pascal; Vaudenay, Serge}, Efficient generation of prime numbers, 340-354 [Zbl 0998.11500]","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$5907808B-13F6-410A-86DC-854D9E7E5C03","rank":"normal"}],"P226":[{"mainsnak":{"snaktype":"value","property":"P226","hash":"6f2c17db95e93f9a5a19ff6c68b3a1df8b0c021e","datavalue":{"value":"00B25","type":"string"},"datatype":"external-id"},"type":"statement","id":"Q1591871$5C6DFD70-73F8-4011-BCE3-AEA721DAA4B3","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P226","hash":"8dc5d8f03fcaaa9e07fb2b90c65b675a74eb1ab2","datavalue":{"value":"94-06","type":"string"},"datatype":"external-id"},"type":"statement","id":"Q1591871$4BAB0DCB-5DAA-488C-A772-EAA92EAAB03C","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P226","hash":"ed293b811733fa9438a72e1b6ba5680a0d2aac9e","datavalue":{"value":"68-06","type":"string"},"datatype":"external-id"},"type":"statement","id":"Q1591871$ED95A7C7-D349-4DAD-A915-78F5CC7D9DE7","rank":"normal"}],"P1451":[{"mainsnak":{"snaktype":"value","property":"P1451","hash":"a2f593955e0ef666be6eb3a6e15dee350de47d76","datavalue":{"value":"1550316","type":"string"},"datatype":"external-id"},"type":"statement","id":"Q1591871$BF90404B-18F7-46BA-80E6-27FD7F0E7E36","rank":"normal"}],"P1450":[{"mainsnak":{"snaktype":"value","property":"P1450","hash":"0a43c34dc9fac156a2104f48540e0eb00cb089a9","datavalue":{"value":"Worcester, MA (USA)","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$9C426A2C-62FE-44BE-8486-3D13BCD3ADA3","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P1450","hash":"5c4c4bb5a86a0fdf66f908b603f2f6975f5ef6fc","datavalue":{"value":"Proceedings","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$74B21249-3751-4DED-95BC-5B63086D6F3E","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P1450","hash":"f7c2172f0a2ed6197400daa3f44dae0d79725b1a","datavalue":{"value":"Workshop","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$52732AAA-8759-497F-B14D-7D2D81A67640","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P1450","hash":"5b252f5b5be24250f4a374434c3fe9d9332c8810","datavalue":{"value":"CHES 2000","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$8186E5D1-7F86-4432-9C88-2F14D54C5053","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P1450","hash":"ceb4faf43b8abb9aa9af4f2ba75287d015d6d35e","datavalue":{"value":"Cryptographic hardware","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$DED748E3-5387-4867-AF34-B98E67D885DD","rank":"normal"},{"mainsnak":{"snaktype":"value","property":"P1450","hash":"90e23dd11b7f15033ed48990579b543ea70c6bbe","datavalue":{"value":"Embedded systems","type":"string"},"datatype":"string"},"type":"statement","id":"Q1591871$F09149EA-A695-4F96-AE55-56B7A3E864B0","rank":"normal"}],"P1460":[{"mainsnak":{"snaktype":"value","property":"P1460","hash":"57f7fea50d2ce1b39b695c4a1313582eed405e38","datavalue":{"value":{"entity-type":"item","numeric-id":5976449,"id":"Q5976449"},"type":"wikibase-entityid"},"datatype":"wikibase-item"},"type":"statement","id":"Q1591871$79B523E5-B8EF-4FB6-A562-01FA644F7B19","rank":"normal"}],"P205":[{"mainsnak":{"snaktype":"value","property":"P205","hash":"ad98022068ef8d4f2a63fd211f855707034b2a0c","datavalue":{"value":"https://doi.org/10.1007/3-540-44499-8","type":"string"},"datatype":"url"},"type":"statement","id":"Q1591871$C37D584B-73FD-401B-BD2C-D9DC5383696E","rank":"normal"}],"P388":[{"mainsnak":{"snaktype":"value","property":"P388","hash":"e7a2f848984ccc4969c00fbae223bde31f48f9c8","datavalue":{"value":"W2498088693","type":"string"},"datatype":"external-id"},"type":"statement","id":"Q1591871$5EF91348-84FD-4D5C-AD1D-632B7CC3F189","rank":"normal"}]},"sitelinks":{"mardi":{"site":"mardi","title":"Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. 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