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The actual proposed test procedure consists of - the access synchronization phase, in which the access of all competing units is brought into a defined order, - the access conflict phase, in which the defined access conflicts are produced and tested. All processors participating in the test run program loops of a carefully calculated length of time. Exchange of control information between the processors (for varying the length of the program loops) is realized via a common memory which is necessary for the test. The test needs no additional hardware. The length of the program loops depends on the number of processors taking part in the test, the test phase and the position of the processor in the access sequence. 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