The following pages link to (Q4319803):
Displaying 7 items.
- Constructive Boolean circuits and the exactness of timed ternary simulation (Q453539) (← links)
- Delay-insensitivity and ternary simulation (Q1575731) (← links)
- Approximate evaluation of the efficiency of synchronous and self-timed methodologies in problems of designing failure-tolerant computing and control systems (Q2139484) (← links)
- A structural approach for the analysis of Petri Nets by reduced unfoldings (Q4633172) (← links)
- Asynchronous control device design by net model behavior simulation (Q4633179) (← links)
- ASYNCHRONOUS AUTOMATA NETWORKS CAN EMULATE ANY SYNCHRONOUS AUTOMATA NETWORK (Q4658708) (← links)
- Verification of asynchronous circuits by BDD-based model checking of Petri nets (Q5096372) (← links)