Systematic synthesis of parallel architectures for the computation of higher order cumulants (Q1978684): Difference between revisions
From MaRDI portal
Added link to MaRDI item. |
Set profile property. |
||
| (3 intermediate revisions by 2 users not shown) | |||
| Property / author | |||
| Property / author: Haris M. Stellakis / rank | |||
| Property / author | |||
| Property / author: Haris M. Stellakis / rank | |||
Normal rank | |||
| Property / describes a project that uses | |||
| Property / describes a project that uses: DG2VHDL / rank | |||
Normal rank | |||
| Property / MaRDI profile type | |||
| Property / MaRDI profile type: MaRDI publication profile / rank | |||
Normal rank | |||
Latest revision as of 05:26, 5 March 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Systematic synthesis of parallel architectures for the computation of higher order cumulants |
scientific article |
Statements
Systematic synthesis of parallel architectures for the computation of higher order cumulants (English)
0 references
4 June 2000
0 references
higher order cummulants
0 references
parallel processing
0 references
VLSL architectures
0 references
