Area-time tradeoffs for bilinear forms computations in VLSI (Q1087015): Difference between revisions
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| Property / full work available at URL: https://doi.org/10.1016/0020-0190(86)90052-9 / rank | |||
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| Property / OpenAlex ID: W1969879412 / rank | |||
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| Property / cites work: Area—Time Optimal VLSI Circuits for Convolution / rank | |||
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| Property / cites work: Q3208805 / rank | |||
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| Property / cites work: Area-time tradeoff for rectangular matrix multiplication in VLSI models / rank | |||
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| Property / cites work: Area-time tradeoffs for matrix multiplication and related problems in VLSI models / rank | |||
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Latest revision as of 18:19, 17 June 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Area-time tradeoffs for bilinear forms computations in VLSI |
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Area-time tradeoffs for bilinear forms computations in VLSI (English)
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1986
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area-time complexity
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VLSI model
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lower bound
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