New Results on Timed Specifications (Q2890330): Difference between revisions

@@ Property / author @@
-Kim Guldstrand Larsen
@@ Property / author: Kim Guldstrand Larsen / rank @@
-Normal rank
@@ Property / author @@
+Kim Guldstrand Larsen
@@ Property / author: Kim Guldstrand Larsen / rank @@
+Normal rank
@@ Property / describes a project that uses @@
+ECDAR
@@ Property / describes a project that uses: ECDAR / rank @@
+Normal rank
@@ Property / describes a project that uses @@
+Uppaal
@@ Property / describes a project that uses: Uppaal / rank @@
+Normal rank
@@ Property / describes a project that uses @@
+UPPAAL TIGA
@@ Property / describes a project that uses: UPPAAL TIGA / rank @@
+Normal rank
@@ Property / MaRDI profile type @@
+MaRDI publication profile
@@ Property / MaRDI profile type: MaRDI publication profile / rank @@
+Normal rank
@@ Property / OpenAlex ID @@
+W1554826871
@@ Property / OpenAlex ID: W1554826871 / rank @@
+Normal rank
@@ Property / cites work @@
+The existence of refinement mappings
@@ Property / cites work: The existence of refinement mappings / rank @@
+Normal rank
@@ Property / cites work @@
+A theory of timed automata
@@ Property / cites work: A theory of timed automata / rank @@
+Normal rank
@@ Property / cites work @@
+Formal Methods for the Design of Real-Time Systems
+Normal rank
@@ Property / cites work @@
+CONCUR 2005 – Concurrency Theory
@@ Property / cites work: CONCUR 2005 – Concurrency Theory / rank @@
+Normal rank
@@ Property / cites work @@
+Timed I/O automata
@@ Property / cites work: Timed I/O automata / rank @@
+Normal rank
@@ Property / cites work @@
+Frontiers of Combining Systems
@@ Property / cites work: Frontiers of Combining Systems / rank @@
+Normal rank
@@ Property / cites work @@
+Q4791854
@@ Property / cites work: Q4791854 / rank @@
+Normal rank
@@ Property / cites work @@
+Q4439564
@@ Property / cites work: Q4439564 / rank @@
+Normal rank
@@ Property / cites work @@
+Q2766627
@@ Property / cites work: Q2766627 / rank @@
+Normal rank
@@ Property / cites work @@
+On the synthesis of discrete controllers for timed systems
+Normal rank