Performance of a new split digital phase lock loop in additive wideband Gaussian noise (Q2874388): Difference between revisions

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Latest revision as of 06:53, 7 July 2024

scientific article
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English
Performance of a new split digital phase lock loop in additive wideband Gaussian noise
scientific article

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    Performance of a new split digital phase lock loop in additive wideband Gaussian noise (English)
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    30 January 2014
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    digitally controlled oscillator (DCO)
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    digital phase lock loop (DPLL)
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    split-loop DPLL
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    noise bandwidth
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    DCO with phase modulation
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    signal-to-noise ratio (SNR)
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    BER
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    field programmable gate array (FPGA)
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