Specifying termination in CSP (Q407510): Difference between revisions

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+https://doi.org/10.1016/j.tcs.2013.05.008
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+W1991632479
@@ Property / OpenAlex ID: W1991632479 / rank @@
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@@ Property / cites work @@
+Termination, deadlock, and divergence
@@ Property / cites work: Termination, deadlock, and divergence / rank @@
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@@ Property / cites work @@
+Process Algebra
@@ Property / cites work: Process Algebra / rank @@
+Normal rank
@@ Property / cites work @@
+A Theory of Communicating Sequential Processes
@@ Property / cites work: A Theory of Communicating Sequential Processes / rank @@
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@@ Property / cites work @@
+Q3680258
@@ Property / cites work: Q3680258 / rank @@
+Normal rank
@@ Property / cites work @@
+Specification and Proof in Real Time CSP
@@ Property / cites work: Specification and Proof in Real Time CSP / rank @@
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@@ Property / cites work @@
+A brief history of Timed CSP
@@ Property / cites work: A brief history of Timed CSP / rank @@
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@@ Property / cites work @@
+Q3899466
@@ Property / cites work: Q3899466 / rank @@
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@@ Property / cites work @@
+Q3777424
@@ Property / cites work: Q3777424 / rank @@
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@@ Property / cites work @@
+Q2767980
@@ Property / cites work: Q2767980 / rank @@
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@@ Property / cites work @@
+A CSP model with flexible parallel termination semantics
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+Q3992568
@@ Property / cites work: Q3992568 / rank @@
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@@ Property / cites work @@
+A timed model for communicating sequential processes
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@@ Property / cites work @@
+The timed failures -- Stability model for CSP
@@ Property / cites work: The timed failures -- Stability model for CSP / rank @@
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@@ Property / cites work @@
+Understanding concurrent systems
@@ Property / cites work: Understanding concurrent systems / rank @@
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+Q3969890
@@ Property / cites work: Q3969890 / rank @@
+Normal rank