A hybrid performance analysis technique for distributed real-time embedded systems (Q1616842): Difference between revisions
From MaRDI portal
Changed an Item |
ReferenceBot (talk | contribs) Changed an Item |
||
Property / cites work | |||
Property / cites work: Models and formal verification of multiprocessor system-on-chips / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: Holistic analysis of asynchronous real-time transactions with earliest deadline scheduling / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs / rank | |||
Normal rank |
Revision as of 06:30, 17 July 2024
scientific article
Language | Label | Description | Also known as |
---|---|---|---|
English | A hybrid performance analysis technique for distributed real-time embedded systems |
scientific article |
Statements
A hybrid performance analysis technique for distributed real-time embedded systems (English)
0 references
7 November 2018
0 references
worst-case response time
0 references
performance analysis
0 references
response time analysis
0 references
partitioned scheduling
0 references
data dependency
0 references
task graph
0 references
0 references