A novel asynchronous parallelism scheme for first-order logic (Q5210792): Difference between revisions
From MaRDI portal
Set profile property. |
ReferenceBot (talk | contribs) Changed an Item |
||
(One intermediate revision by one other user not shown) | |||
Property / full work available at URL | |||
Property / full work available at URL: https://doi.org/10.1007/3-540-58156-1_35 / rank | |||
Normal rank | |||
Property / OpenAlex ID | |||
Property / OpenAlex ID: W1599727345 / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: Q4003525 / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: Q3489479 / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: Q3491009 / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: A Prolog technology theorem prover: Implementation by an extended Prolog compiler / rank | |||
Normal rank | |||
Property / cites work | |||
Property / cites work: The deevolution of concurrent logic programming languages / rank | |||
Normal rank |
Latest revision as of 12:22, 21 July 2024
scientific article; zbMATH DE number 7154568
Language | Label | Description | Also known as |
---|---|---|---|
English | A novel asynchronous parallelism scheme for first-order logic |
scientific article; zbMATH DE number 7154568 |
Statements
A novel asynchronous parallelism scheme for first-order logic (English)
0 references
21 January 2020
0 references