A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol (Q1318283): Difference between revisions

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+A survey of verification techniques for parallel programs
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+Automatic verification of finite-state concurrent systems using temporal logic specifications
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+FM8501: a verified microprocessor
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+Adequate proof principles for invariance and liveness properties of concurrent programs
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+A calculus of communicating systems
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+A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol
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+Reaching Agreement in the Presence of Faults
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