Fast algorithms for lowest common ancestors on a processor array with reconfigurable buses (Q1183475): Difference between revisions

@@ Property / cites work @@
+Q3484355
@@ Property / cites work: Q3484355 / rank @@
+Normal rank
@@ Property / cites work @@
+Approximate Parallel Scheduling. Part I: The Basic Technique with Applications to Optimal Parallel List Ranking in Logarithmic Time
+Normal rank
@@ Property / cites work @@
+Fast Algorithms for Finding Nearest Common Ancestors
+Normal rank
@@ Property / cites work @@
+Parallel Algorithms in Graph Theory: Planarity Testing
+Normal rank
@@ Property / cites work @@
+Q5585020
@@ Property / cites work: Q5585020 / rank @@
+Normal rank
@@ Property / cites work @@
+On Finding Lowest Common Ancestors: Simplification and Parallelization
+Normal rank
@@ Property / cites work @@
+Finding Lowest Common Ancestors in Parallel
@@ Property / cites work: Finding Lowest Common Ancestors in Parallel / rank @@
+Normal rank
@@ Property / cites work @@
+Constant time sorting on a processor array with a reconfigurable bus system
+Normal rank
@@ Property / cites work @@
+Two dimensional processor array with a reconfigurable bus system is at least as powerful as CRCW model
+Normal rank
@@ Property / Wikidata QID @@
+Q127498852
@@ Property / Wikidata QID: Q127498852 / rank @@
+Normal rank
@@ Property / full work available at URL @@
+https://doi.org/10.1016/0020-0190(91)90082-s
+Normal rank
@@ Property / OpenAlex ID @@
+W2023588769
@@ Property / OpenAlex ID: W2023588769 / rank @@
+Normal rank