ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE (Q3569283): Difference between revisions
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| Property / cites work: Dynamic Perfect Hashing: Upper and Lower Bounds / rank | |||
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| Property / cites work: ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE / rank | |||
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| Property / cites work: Q3777424 / rank | |||
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| Property / full work available at URL: https://doi.org/10.1142/s0129054110007325 / rank | |||
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Latest revision as of 12:03, 30 July 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE |
scientific article |
Statements
ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE (English)
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18 June 2010
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parallel computing
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PRAM
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performance
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silicon area
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power consumption
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