A method of synthesis of irredundant circuits admitting single fault detection tests of constant length (Q1741482): Difference between revisions

From MaRDI portal
Import240304020342 (talk | contribs)
Set profile property.
Created claim: Wikidata QID (P12): Q128315479, #quickstatements; #temporary_batch_1723800143925
 
(2 intermediate revisions by 2 users not shown)
Property / full work available at URL
 
Property / full work available at URL: https://doi.org/10.1515/dma-2019-0005 / rank
 
Normal rank
Property / OpenAlex ID
 
Property / OpenAlex ID: W2917031641 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q2968777 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Easily Testable Realizations ror Logic Functions / rank
 
Normal rank
Property / cites work
 
Property / cites work: On Minimally Testable Logic Networks / rank
 
Normal rank
Property / cites work
 
Property / cites work: Design of easily testable combinational circuits / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4542626 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Dual-Mode Logic for Function-Independent Fault Testing / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3731525 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3197775 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Method of synthesis of easily testable circuits admitting single fault detection tests of constant length / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3807128 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Synthesis of easily-tested circuits in the case of single-type constant malfunctions at the element outputs / rank
 
Normal rank
Property / cites work
 
Property / cites work: Circuits admitting single-fault tests of length 1 under constant faults at outputs of elements / rank
 
Normal rank
Property / cites work
 
Property / cites work: Synthesis of easily testable circuits over the Zhegalkin basis in the case of constant faults of type 0 at outputs of elements / rank
 
Normal rank
Property / cites work
 
Property / cites work: Lower estimate of the length of the complete test in the basis \(\{x|y \}\) / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the synthesis of circuits admitting complete fault detection test sets of constant length under arbitrary constant faults at the outputs of the gates / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the exact value of the length of the minimal single diagnostic test for a particular class of circuits / rank
 
Normal rank
Property / cites work
 
Property / cites work: LOWER BOUNDS FOR LENGTHS OF COMPLETE DIAGNOSTIC TESTS FOR CIRCUITS AND INPUTS OF CIRCUITS / rank
 
Normal rank
Property / cites work
 
Property / cites work: SINGLE FAULT DETECTION TESTS FOR LOGIC NETWORKS OF AND, NOT GATES / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4308366 / rank
 
Normal rank
Property / cites work
 
Property / cites work: On reliability of circuits over an arbitrary complete finite basis under single-type constant faults at outputs of elements / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q5264747 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4830983 / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the circuits reliability in ``anticonjunction'' basis with constant faults at gate inputs / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4090250 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q5249317 / rank
 
Normal rank
Property / Wikidata QID
 
Property / Wikidata QID: Q128315479 / rank
 
Normal rank

Latest revision as of 10:24, 16 August 2024

scientific article
Language Label Description Also known as
English
A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
scientific article

    Statements

    A method of synthesis of irredundant circuits admitting single fault detection tests of constant length (English)
    0 references
    0 references
    0 references
    3 May 2019
    0 references
    circuit of gates
    0 references
    fault detection test
    0 references
    stuck-at fault
    0 references
    Shannon function
    0 references
    easily testable circuit
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references

    Identifiers

    0 references
    0 references
    0 references
    0 references
    0 references
    0 references
    0 references