An efficient hardware accelerator architecture for implementing fast IMDCT computation (Q985619): Difference between revisions
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scientific article
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English | An efficient hardware accelerator architecture for implementing fast IMDCT computation |
scientific article |
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An efficient hardware accelerator architecture for implementing fast IMDCT computation (English)
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6 August 2010
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hardware accelerators
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inverse modified discrete cosine transform
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type-IV discrete cosine/sine transform
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type-II inverse discrete cosine transform
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