Optimal cell flipping to minimize channel density in VLSI design and pseudo-Boolean optimization (Q1276959): Difference between revisions

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Normal rank
Property / cites work
 
Property / cites work: The orientation of modules based on graph decomposition / rank
 
Normal rank
Property / cites work
 
Property / cites work: Roof duality, complementation and persistency in quadratic 0–1 optimization / rank
 
Normal rank
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Latest revision as of 08:51, 13 November 2024

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Optimal cell flipping to minimize channel density in VLSI design and pseudo-Boolean optimization
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    Optimal cell flipping to minimize channel density in VLSI design and pseudo-Boolean optimization (English)
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    25 May 1999
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    VLSI design
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    cell flipping
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