A design of fast pipelined modular multiplier based on a diminished-radix algorithm (Q1312101): Difference between revisions
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| Property / author: Stafford E. Tavares / rank | |||
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| Property / author: Stafford E. Tavares / rank | |||
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| Property / MaRDI profile type: MaRDI publication profile / rank | |||
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| Property / full work available at URL: https://doi.org/10.1007/bf00203816 / rank | |||
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Latest revision as of 10:52, 30 July 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A design of fast pipelined modular multiplier based on a diminished-radix algorithm |
scientific article |
Statements
A design of fast pipelined modular multiplier based on a diminished-radix algorithm (English)
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24 February 1994
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computer arithmetic
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VLSI
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modular exponentiation
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modular- multiplication
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CMOS
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