On minimising the maximum expected verification time (Q1675917): Difference between revisions

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+MaRDI publication profile
@@ Property / MaRDI profile type: MaRDI publication profile / rank @@
+Normal rank
@@ Property / OpenAlex ID @@
+W2583964271
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+Normal rank
@@ Property / cites work @@
+On simulation-based probabilistic model checking of mixed-analog circuits
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+Tools and Algorithms for the Construction and Analysis of Systems
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+SyLVaaS: System Level Formal Verification as a Service*
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+Undecidability of Quantized State Feedback Control for Discrete Time Linear Hybrid Systems
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+Q4221106
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+Normal rank
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+Q2845493
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+Normal rank
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+Bayesian statistical model checking with application to Stateflow/Simulink verification
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+Symbolic-Numeric Reachability Analysis of Closed-Loop Control Software
+Normal rank