Timed verification of the generic architecture of a memory circuit using parametric timed automata (Q1028737): Difference between revisions
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Revision as of 18:06, 29 February 2024
scientific article
| Language | Label | Description | Also known as |
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| English | Timed verification of the generic architecture of a memory circuit using parametric timed automata |
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Timed verification of the generic architecture of a memory circuit using parametric timed automata (English)
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6 July 2009
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memory circuit
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timed automata
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model checking
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