A design of fast pipelined modular multiplier based on a diminished-radix algorithm (Q1312101): Difference between revisions
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Revision as of 11:46, 1 March 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A design of fast pipelined modular multiplier based on a diminished-radix algorithm |
scientific article |
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A design of fast pipelined modular multiplier based on a diminished-radix algorithm (English)
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24 February 1994
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computer arithmetic
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VLSI
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modular exponentiation
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modular- multiplication
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CMOS
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