Testing and reconfiguration of VLSI linear arrays (Q1128669): Difference between revisions

From MaRDI portal
Import240304020342 (talk | contribs)
Set profile property.
ReferenceBot (talk | contribs)
Changed an Item
 
Property / cites work
 
Property / cites work: Catastrophic faults in reconfigurable systolic linear arrays / rank
 
Normal rank
Property / cites work
 
Property / cites work: On reconfigurability of VLSI linear arrays / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4198056 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Configuration of VLSI Arrays in the Presence of Defects / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q3885184 / rank
 
Normal rank
Property / cites work
 
Property / cites work: On fault-tolerant structure, distributed fault-diagnosis, reconfiguration, and recovery of the array processors / rank
 
Normal rank
Property / cites work
 
Property / cites work: Efficient construction of catastrophic patterns for VLSI reconfigurable arrays / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4730787 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Counting the number of fault patterns in redundant VLSI arrays / rank
 
Normal rank

Latest revision as of 15:44, 28 May 2024

scientific article
Language Label Description Also known as
English
Testing and reconfiguration of VLSI linear arrays
scientific article

    Statements

    Testing and reconfiguration of VLSI linear arrays (English)
    0 references
    0 references
    0 references
    0 references
    13 August 1998
    0 references
    0 references
    array processors
    0 references
    catastrophic fault patterns
    0 references
    fault tolerance
    0 references
    fault detection
    0 references
    reconfiguration algorithms
    0 references