DESA: a new hybrid global optimization method and its application to analog integrated circuit sizing (Q2271157): Difference between revisions

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Property / cites work: A New Method of Constrained Optimization and a Comparison With Other Methods / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4215359 / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the Convergence of Pattern Search Algorithms / rank
 
Normal rank
Property / cites work
 
Property / cites work: A combined global \& local search (CGLS) approach to global optimization / rank
 
Normal rank
Property / cites work
 
Property / cites work: A combined heuristic optimization technique / rank
 
Normal rank
Property / cites work
 
Property / cites work: Optimization by Simulated Annealing / rank
 
Normal rank
Property / cites work
 
Property / cites work: Differential evolution -- a simple and efficient heuristic for global optimization over continuous spaces / rank
 
Normal rank
Property / cites work
 
Property / cites work: Q4239927 / rank
 
Normal rank
Property / cites work
 
Property / cites work: Convergence of the simulated annealing algorithm for continuous global optimization / rank
 
Normal rank
Property / cites work
 
Property / cites work: Fast stochastic global optimization / rank
 
Normal rank
Property / cites work
 
Property / cites work: On the convergence of a population-based global optimization algorithm / rank
 
Normal rank

Revision as of 20:21, 1 July 2024

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DESA: a new hybrid global optimization method and its application to analog integrated circuit sizing
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    DESA: a new hybrid global optimization method and its application to analog integrated circuit sizing (English)
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    6 August 2009
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    optimization
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    simulated annealing
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    differential evolution
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    analog integrated circuit sizing
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