A nonlinear optimization methodology for VLSI fixed-outline floorplanning (Q1016045)
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| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A nonlinear optimization methodology for VLSI fixed-outline floorplanning |
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A nonlinear optimization methodology for VLSI fixed-outline floorplanning (English)
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4 May 2009
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circuit layout design
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VLSI floorplanning
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facility layout
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combinatorial optimization
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global optimization
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convex programming
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