Entity usage

This page lists pages that use the given entity (e.g. Q42). The list is sorted by descending page ID, so that newer pages are listed first.

Showing below up to 50 results in range #51 to #100.

Using πDDs in the Design of Reversible Circuits: Label: en
Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams: Label: en
Garbage-Free Reversible Integer Multiplication with Constants of the Form 2 k ±2 l ±1: Label: en
Garbageless Reversible Implementation of Integer Linear Transformations: Label: en
Design of an Online Testable Ternary Circuit from the Truth Table: Label: en
Optimal 4-bit Reversible Mixed-Polarity Toffoli Circuits: Label: en
Properties of Quantum Templates: Label: en
Reversible and Quantum Circuit Optimization: A Functional Approach: Label: en
Towards a General-Purpose, Reversible Language for Controlling Self-reconfigurable Robots: Label: en
Frugal Encoding in Reversible $\mathcal{MOQA}$ : A Case Study for Quicksort: Label: en
Synthesizing Loops for Program Inversion: Label: en
Isomorphic Interpreters from Logically Reversible Abstract Machines: Label: en
Undecidability of the Surjectivity of the Subshift Associated to a Turing Machine: Label: en
A Deterministic Two-Way Multi-head Finite Automaton Can Be Converted into a Reversible One with the Same Number of Heads: Label: en
One-Way Reversible Multi-head Finite Automata: Label: en
Tutorial: Graphical Calculus for Quantum Circuits: Label: en
Checking Reversibility of Boolean Functions: Label: en
A Fast Symbolic Transformation Based Algorithm for Reversible Logic Synthesis: Label: en
Generating Reversible Circuits from Higher-Order Functional Programs: Label: en
A Finite Alternation Result for Reversible Boolean Circuits: Label: en
Enumeration of Reversible Functions and Its Application to Circuit Complexity: Label: en
Strongly Universal Reversible Gate Sets: Label: en
Application of Permutation Group Theory in Reversible Logic Synthesis: Label: en
Towards Quantum Programs Verification: From Quipper Circuits to QPMC: Label: en
Circular CNOT Circuits: Definition, Analysis and Application to Fault-Tolerant Quantum Circuits: Label: en
Using $$\pi $$ DDs for Nearest Neighbor Optimization of Quantum Circuits: Label: en
Design of p-Valued Deutsch Quantum Gates with Multiple Control Signals and Mixed Polarity: Label: en
Design and Fabrication of CSWAP Gate Based on Nano-Electromechanical Systems: Label: en
Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs: Label: en
Toward an Energy Efficient Language and Compiler for (Partially) Reversible Algorithms: Label: en
Reversible Computation vs. Reversibility in Petri Nets: Label: en
BDD Operations for Quantum Graph States: Label: en
Equivalence Checking in Multi-level Quantum Systems: Label: en
Boosting Reversible Pushdown Machines by Preprocessing: Label: en
Cross-Level Validation of Topological Quantum Circuits: Label: en
Reversible Causal Graph Dynamics: Label: en
2D Qubit Layout Optimization for Topological Quantum Computation: Label: en
Reversing Single Sessions: Label: en
Mapping NCV Circuits to Optimized Clifford+T Circuits: Label: en
Static VS Dynamic Reversibility in CCS: Label: en
Quantum Circuit Optimization by Hadamard Gate Reduction: Label: en
A Calculus for Local Reversibility: Label: en
Minimal Designs of Reversible Sequential Elements: Label: en
Rigid Families for the Reversible $$\pi $$ -Calculus: Label: en
Templates for Positive and Negative Control Toffoli Networks: Label: en
Constructive Reversible Logic Synthesis for Boolean Functions with Special Properties: Label: en
Arbitration and Reversibility of Parallel Delay-Insensitive Modules: Label: en
Trace Complexity of Chaotic Reversible Cellular Automata: Label: en
Degrees of Reversibility for DFA and DPDA: Label: en
Concurrency and Reversibility: Label: en