Parallel ILP for distributed-memory architectures
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Publication:1009328
DOI10.1007/s10994-008-5094-2zbMath1470.68105WikidataQ57739941 ScholiaQ57739941MaRDI QIDQ1009328
Nuno A. Fonseca, Fernando Silva, Ashwin Srinivasan, Rui Camacho
Publication date: 31 March 2009
Published in: Machine Learning (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10994-008-5094-2
68T05: Learning and adaptive systems in artificial intelligence
68W10: Parallel algorithms in computer science
68N17: Logic programming
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Table space designs for implicit and explicit concurrent tabled evaluation, Parallel Logic Programming: A Sequel, Data and task parallelism in ILP using mapreduce, Threads and or-parallelism unified
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