A Versatile Reconfigurable Bit-Serial Multiplier Architecture in Finite Fields GF(2m)
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Publication:3628444
DOI10.1007/978-3-540-89985-3_28zbMath1188.68097OpenAlexW247351624MaRDI QIDQ3628444
Morteza Nikooghadam, Ali Zakerolhosseini, Ehsan Malekian
Publication date: 20 May 2009
Published in: Communications in Computer and Information Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-540-89985-3_28
irreducible polynomialelliptic curve cryptographylinear feedback shift registerGalois fieldbit-serial multiplier
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