On optimum single-row routing

DOI10.1109/TCS.1979.1084650zbMath0409.94054OpenAlexW2016432840MaRDI QIDQ4198668

Ernest S. Kuh, Toshio Fujisawa, Toshinobu Kashiwabara

Publication date: 1979

Published in: IEEE Transactions on Circuits and Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tcs.1979.1084650

zbMATH Keywords

single-row routingmultilayer printed circuit boardsgraph theory interpretation

Mathematics Subject Classification ID

Circuits, networks (94C99) Applications of graph theory to circuits and networks (94C15) Large-scale systems (93A15)

Related Items (6)

Ranking intervals under visibility constraints^∗ ⋮ Multilayer grid embeddings for VLSI ⋮ A lower bound on the area of permutation layouts ⋮ The benefits of external wires in single row routing ⋮ Partitioning technique for transforming perfect binary trees into single-row networks ⋮ Double-row planar routing and permutation layout

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