Formalizing Timing Diagram Requirements in Discrete Duration Calculus
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Publication:5194655
DOI10.1007/978-3-319-66197-1_16zbMath1420.68134arXiv1705.04510OpenAlexW2613810324MaRDI QIDQ5194655
Paritosh K. Pandya, Amol Wakankar, Raj Mohan Matteplackel
Publication date: 16 September 2019
Published in: Software Engineering and Formal Methods (Search for Journal in Brave)
Full work available at URL: https://arxiv.org/abs/1705.04510
Specification and verification (program logics, model checking, etc.) (68Q60) Temporal logic (03B44)
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