On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP (Q1001805)
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English | On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP |
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On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP (English)
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19 February 2009
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asynchronous circuit
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asynchronous logic
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asynchrony
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chp
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formal method
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gals architecture
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handshake protocol
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hardware architecture
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hardware design
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lotos
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modelling
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network on chip
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process calculus
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specification
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structured operational semantics
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translation
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validation
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verification
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