High Speed Binary Parallel Adder

DOI10.1109/PGEC.1966.264571zbMath0156.01902OpenAlexW1997629969MaRDI QIDQ5537392

Allen H. Brady

Publication date: 1966

Published in: IEEE Transactions on Electronic Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/pgec.1966.264571

zbMATH Keywords

mathematical logic

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