Timed verification of the generic architecture of a memory circuit using parametric timed automata (Q1028737)

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Timed verification of the generic architecture of a memory circuit using parametric timed automata
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    Timed verification of the generic architecture of a memory circuit using parametric timed automata (English)
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    6 July 2009
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    memory circuit
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    timed automata
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    model checking
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