Pages that link to "Item:Q1329086"

The following pages link to An exercise in the automatic verification of asynchronous designs (Q1329086):

Displaying 2 items.

• On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP (Q1001805) (← links)
• TTL: A modular language for hardware/software systems design. (Q1400574) (← links)