The following pages link to D. V. Efanov (Q268668):
Displayed 10 items.
- Applications of modular summation codes to concurrent error detection systems for combinational Boolean circuits (Q268671) (← links)
- Summation codes for organization of control of combinational circuits (Q462018) (← links)
- On summation code properties in functional control circuits (Q612080) (← links)
- Sum codes with efficient detection of twofold errors for organization of concurrent error-detection systems of logical devices (Q1796241) (← links)
- Synthesis of self-checking combination devices based on allocating special groups of outputs (Q1992268) (← links)
- Boolean-complement based fault-tolerant electronic device architectures (Q2052593) (← links)
- On codes with summation of data bits in concurrent error detection systems (Q2261788) (← links)
- Sum codes with fixed values of multiplicities for detectable unidirectional and asymmetrical errors for technical diagnostics of discrete systems (Q2290420) (← links)
- New structures of the concurrent error detection systems for logic circuits (Q2397271) (← links)
- Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger's code (Q2399754) (← links)