A Dedicated Sieving Hardware

DOI10.1007/3-540-36288-6_19MaRDI QIDQ4414713zbMATH OpenOpenAlexFDO

Authors Rainer Steinwandt, Willi Geiselmann

Publication date 27 July 2003

Published in Public Key Cryptography — PKC 2003 (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/3-540-36288-6_19

zbMATH Keywords

circuitsfactorizationnumber field sieveRSA

Mathematics Subject Classification ID

Factorization (11Y05) Cryptography (94A60) Analytic circuit theory (94C05)

Recommendations

• Advances in Cryptology - CRYPTO 2003
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Cited in

(8)

• Sieving and expanders
• Analysis and optimization of the twinkle factoring device
• CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
• scientific article; zbMATH DE number 733565 (Why is no real title available?)
• Hardware to solve sparse systems of linear equations over GF(2).
• A Simpler Sieving Device: Combining ECM and TWIRL
• Advances in Cryptology - CRYPTO 2003
• Topics in Cryptology – CT-RSA 2004

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