A Proper Model for Testing the Planarity of Electrical Circuits

DOI10.1002/J.1538-7305.1973.TB03188.XMaRDI QIDQ5675628zbMATH OpenOpenAlexFDO

Authors A. J. Goldstein, D. G. Schweikert

Publication date 1973

Published in Bell System Technical Journal (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1002/j.1538-7305.1973.tb03188.x

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Applications of graph theory to circuits and networks (94C15)

Recommendations

• scientific article; zbMATH DE number 4079189
• A new planarity test
• On the Optimal Layout of Planar Graphs with Fixed Boundary
• scientific article; zbMATH DE number 1559558
• Planar electric networks. I

Cited in

(4)

• Orthogonal drawings of graphs for the automation of VLSI circuit design
• A new neural network algorithm for planarization problems
• scientific article; zbMATH DE number 4089610 (Why is no real title available?)
• scientific article; zbMATH DE number 1996243 (Why is no real title available?)

This page was built for publication: A Proper Model for Testing the Planarity of Electrical Circuits

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5675628)