A scalable parallel algorithm for reachability analysis of very large circuits

DOI10.1023/A:1020373206491MaRDI QIDQ1871864zbMATH OpenFDO

Authors Tamir Heyman, Danny Geist, Assaf Schuster, Orna Grumberg

Publication date 4 May 2003

Published in Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/A:1020373206491

zbMATH Keywords

distributed space requirementmodel checkingsymbolic slicingverification

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10)

Recommendations

• scientific article; zbMATH DE number 1670766
• Lazy reachability analysis in distributed systems
• A work-efficient distributed algorithm for reachability analysis.
• A work-efficient distributed algorithm for reachability analysis
• Correct Hardware Design and Verification Methods

Cited in

(9)

• GSTE is partitioned model checking
• A work-efficient distributed algorithm for reachability analysis
• Dealing with practical limitations of distributed timed model checking for timed automata
• scientific article; zbMATH DE number 1670766 (Why is no real title available?)
• VERIFYING VERY LARGE INDUSTRIAL CIRCUITS USING 100 PROCESSES AND BEYOND
• Automated Technology for Verification and Analysis
• Correct Hardware Design and Verification Methods
• A work-efficient distributed algorithm for reachability analysis.
• Distributed symbolic model checking for -calculus

This page was built for publication: A scalable parallel algorithm for reachability analysis of very large circuits

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1871864)