A software instruction prefetching method in architectures with static scheduling

DOI10.1007/S11086-008-1006-2MaRDI QIDQ840000zbMATH OpenOpenAlexFDO

Authors A. B. Galazin, E. V. Stupachenko, S. L. Shlykov

Publication date 4 September 2009

Published in Programming and Computer Software (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s11086-008-1006-2

zbMATH Keywords

instruction stalls

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Theory of software (68N99)

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(9)

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• Loop-Based Instruction Prefetching to Reduce the Worst-Case Execution Time
• A novel instruction stream buffer for VLIW architectures

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