A statement based parallelizing framework for processor-in-memory architectures

DOI10.1016/S0020-0190(02)00353-8MaRDI QIDQ1853696zbMATH OpenOpenAlexFDO

Authors Tsung-Chuan Huang, Slo-Li Chu

Publication date 22 January 2003

Published in Information Processing Letters (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/s0020-0190(02)00353-8

zbMATH Keywords

FlexRAMparallelizing compilerprocessor-in-memorySAGEschedulingstatement analysis

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Theory of compilers and interpreters (68N20)

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