An Expressive Framework for Verifying Deadlock Freedom

DOI10.1007/978-3-319-02444-8_21MaRDI QIDQ5166694zbMATH OpenOpenAlexFDO

Authors D. K. Le, Wei-Ngan Chin, Yong Meng Teo

Publication date 8 July 2014

Published in Automated Technology for Verification and Analysis (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-319-02444-8_21

zbMATH Keywords

verificationconcurrencyspecificationdeadlock

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

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Cited in

(8)

• A specification structure for deadlock-freedom of synchronous processes
• Deadlock-free channels and locks
• An extensional treatment of lazy data flow deadlock
• Formal deadlock elimination in an object oriented conceptual schema
• Deadlock-free monitors
• Tighter reachability criteria for deadlock-freedom analysis
• Verification, Model Checking, and Abstract Interpretation
• Deadlock-freedom in component systems with architectural constraints

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