An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm

DOI10.1007/978-3-540-78440-1_13MaRDI QIDQ5445455zbMATH OpenOpenAlexFDO

Authors Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek El-Ghazawi

Publication date 5 March 2008

Published in Public key cryptography -- PKC 2008. 11th international workshop on practice and theory in public-key cryptography, Barcelona, Spain, March 9--12, 2008. Proceedings (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-540-78440-1_13

zbMATH Keywords

Montgomery MultiplicationField Programmable Gate ArraysMWR2MM Algorithm

Mathematics Subject Classification ID

Cryptography (94A60) Authentication, digital signatures and secret sharing (94A62)

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• A method for obtaining digital signatures and public-key cryptosystems
• Modular Multiplication Without Trial Division

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