An analysis of charge-pump phase-locked loops
From MaRDI portal
Cited in
(4)- Event Driven Modeling and Characterization of the Second Order Voltage Switched Charge Pump PLL
- Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump
- Analysis of the PLL Jitter Due to Power/Ground and Substrate Noise
- Comparison of various threshold modulation techniques used in pulse stuffing synchronizers
This page was built for publication: An analysis of charge-pump phase-locked loops
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4590412)