An improved time-slot assignment algorithm for TDM hierarchical switching systems

DOI10.1109/26.216505MaRDI QIDQ4202026zbMATH OpenOpenAlexFDO

Authors Suresh Chalasani, Anujan Varma

Publication date 16 September 1993

Published in IEEE Transactions on Communications (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/26.216505

Mathematics Subject Classification ID

Circuits, networks (94C99)

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