Asynchronous PRAMs with memory latency

DOI10.1006/JPDC.1994.1115MaRDI QIDQ1345653zbMATH OpenOpenAlexFDO

Authors Chip Martel, Arvind U. Raghunathan

Publication date 8 March 1995

Published in Journal of Parallel and Distributed Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1006/jpdc.1994.1115

zbMATH Keywords

randomized algorithmsasynchronous PRAM modelscertified write-all problemglobal memory

Mathematics Subject Classification ID

Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Distributed algorithms (68W15)

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• Can an operation both update the state and return a meaningful value in the asynchronous PRAM model?
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• Clock construction in fully asynchronous parallel systems and PRAM simulation
• The expected advantage of asynchrony

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