Automatic Generation of Modular Multipliers for FPGA Applications

DOI10.1109/TC.2008.102MaRDI QIDQ4975045zbMATH OpenOpenAlexFDO

Authors Jean-Luc Beuchat, Jean-Michel Muller

Publication date 8 August 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2008.102

Mathematics Subject Classification ID

Cryptography (94A60)

Cited in

(1)

• A HDL generator for flexible and efficient finite-field multipliers on FPGAs

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