Axioms for memory access in asynchronous hardware systems

DOI10.1145/5001.5007MaRDI QIDQ3723682zbMATH OpenOpenAlexWikidataFDO

Authors

Publication date 1986

Published in ACM Transactions on Programming Languages and Systems (Search for Journal in Brave)

Full work available at URL http://www.acm.org/pubs/contents/journals/toplas/1986-8/

zbMATH Keywords

asynchronous algorithmsconcurrent accesseslow-level hardware componentsVLSI

Mathematics Subject Classification ID

Theory of operating systems (68N25)

Recommendations

• scientific article; zbMATH DE number 3907760
• The behavior of shared objects: Concept, pitfalls, and a new model
• First-order axioms for asynchrony
• The weakest memory-access order
• Time-Adaptive Algorithms for Synchronization

Cited in

(21)

• Proof of correctness of Ressel's adopted algorithm
• On interprocess communication. II: Algorithms
• The behavior of shared objects: Concept, pitfalls, and a new model
• A criterion for atomicity
• Linearizable read/write objects
• Asynchronous PRAMs with memory latency
• Data-race and concurrent-write freedom are undecidable.
• Analyzing linearizability violations in the presence of read-modify-write operations
• Schedulers and finishers: on generating and filtering the behaviours of an event structure
• Leveraging access mode declarations in a model for memory consistency in heterogeneous systems
• Composite registers
• Relationships between memory models
• Atomic read/write memory in signature-free Byzantine asynchronous message-passing systems
• Time and space optimal implementations of atomic multi-writer register
• Schedulers and finishers: on generating the behaviours of an event structure
• Concurrent Kleene Algebra
• scientific article; zbMATH DE number 3907760 (Why is no real title available?)
• Introduction à l'algorithmique des objets partagés
• Computing k-atomicity in polynomial time
• A simple object that spans the whole consensus hierarchy
• Causal memory: definitions, implementation, and programming

This page was built for publication: Axioms for memory access in asynchronous hardware systems

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3723682)