BISIMULATOR
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(27)- On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP
- jETI
- SCADE
- Tiburon
- TIMES
- M-TREE
- CADP
- Fiacre
- Exp.Open
- csp2B
- From generic partition refinement to weighted tree automata minimization
- VLTS Benchmark Suite
- TVT
- CAESAR_SOLVE
- Concurrency Workbench
- CADP 2010: a toolbox for the construction and analysis of distributed processes
- DLC
- Mec 5
- LNT2LOTOS
- VERSA
- XTL
- CAESAR
- mCRL
- Automatic distributed code generation from formal models of asynchronous processes interacting by multiway rendezvous
- Translating Hardware Process Algebras into Standard Process Algebras: Illustration with CHP and LOTOS
- Model Checking Software
- Translating FSP into LOTOS and networks of automata
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