Bit-level systolic implementation of discrete orthogonal transforms

DOI10.1016/S0165-1684(01)00021-4MaRDI QIDQ5958666zbMATH OpenFDO

Authors S. S. Nayak, H. Panda, M. Narasimha Murty

Publication date 3 March 2002

Published in Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/S0165-1684(01)00021-4

zbMATH Keywords

bit-level systolic architecturecomplexitiesdiscrete orthogonal transformsserial-parallel vector matrix multiplication scheme

Mathematics Subject Classification ID

Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Analysis of algorithms and problem complexity (68Q25) Parallel algorithms in computer science (68W10) Application of orthogonal and other special functions (94A11)

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