Buffering for vector performance on a pipelined MIMD machine

DOI10.1016/S0167-8191(84)90048-6MaRDI QIDQ799072zbMATH OpenFDO

Authors Danny C. Sorensen

Publication date 1984

Published in Parallel Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/S0167-8191(84)90048-6

zbMATH Keywords

Buffering blocks of data to registersHEP computermatrix vector productspipelined floating-point operationspipelined MIMD computervector performance

Mathematics Subject Classification ID

Theory of operating systems (68N25)

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Cited in

(4)

• A pipelined Givens method for computing the QR factorization of a sparse matrix
• Linear algebra on high performance computers
• Influence of memory systems on vector processor performance
• A cost-effective architecture for vectorizable numerical and multimedia applications

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