Derivation of Minimum Test Sets for Unate Logical Circuits

DOI10.1109/T-C.1971.223126MaRDI QIDQ5639631zbMATH OpenFDO

Authors Rodolfo Betancourt

Publication date 1971

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/T-C.1971.223126

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cited in

(1)

• Algebraic analysis of multiple faults in combinational networks

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