Dynamic parallel memories
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- Optimal parallel quicksort on EREW PRAM
- The parallel hierarchical memory model
- Parallel algorithm ``conveyer processing with a minimal memory usage
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- Parallelism versus memory allocation in pipelined router forwarding engines
- Running ASCEND, DESCEND and PIPELINE algorithms in parallel using small processors
- Merging heaps in parallel
- Data independence of read, write, and control structures in PRAM computations
- Rubber bands, convex embeddings and graph connectivity
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